/**
 * @file enc28j60.h
 * @author zdk
 * @brief ENC28J60驱动
 * @version 0.1
 * @date 2020-06-01 初始版本
 * 
 * BSD 3-Clause License
 * 
 * Copyright (c) 2021, water_zhang
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * * Redistributions of source code must retain the above copyright notice, this
 *   list of conditions and the following disclaimer.
 * 
 * * Redistributions in binary form must reproduce the above copyright notice,
 *   this list of conditions and the following disclaimer in the documentation
 *   and/or other materials provided with the distribution.
 * 
 * * Neither the name of the copyright holder nor the names of its
 *   contributors may be used to endorse or promote products derived from
 *   this software without specific prior written permission.
 * 
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * 
 */

#if !defined(ENC28J60_H)
#define ENC28J60_H

#include <stdint.h>

#define ENC28J60_ENABLE_FULL_DUPLEX (1) /* 设置为1使能全双工，否则配置为半双工 */
#define ENC28J60_ENABLE_INT (1) /* 置1使能中断相关的功能 */

/*********接收缓冲区范围**********/
/**
 * ENC28J60共有8k缓冲区(0x0000~0x1FFF)
 * 可以手动划分接收缓冲区的占用大小
 * 其余部分将被作为发送缓冲区
 **/
#define ENC28J60_RECEIVE_BUFFER_START   (0x0000)
#define ENC28J60_RECEIVE_BUFFER_END     (0x0FFF)
#define ENC28J60_RECIVE_BUFFER_LEN      (ENC28J60_RECEIVE_BUFFER_END - ENC28J60_RECEIVE_BUFFER_START + 1)
#define ENC28J60_TRANSMIT_BUFFER_START  (ENC28J60_RECEIVE_BUFFER_END + 1)
#define ENC28J60_TRANSMIT_BUFFER_END    (0x1FFF)
#define ENC28J60_TRANSMIT_BUFFER_LEN    (ENC28J60_TRANSMIT_BUFFER_END - ENC28J60_TRANSMIT_BUFFER_START + 1)
#define ENC28J60_PACKAGE_MAX_LEN        (1518)

/**********bank无关寄存器，可以在任意bank访问****/
#define REG_NOBANK_EIE      (0x1B)
#define REG_NOBANK_EIR      (0x1C)
#define REG_NOBANK_ESTAT    (0x1D)
#define REG_NOBANK_ECON2    (0x1E)
#define REG_NOBANK_ECON1    (0x1F)

/**********bank0寄存器*************************/
#define REG_BANK0_ERDPTL    (0x00)
#define REG_BANK0_ERDPTH    (0x01)
#define REG_BANK0_EWRPTL    (0x02)
#define REG_BANK0_EWRPTH    (0x03)
#define REG_BANK0_ETXSTL    (0x04)
#define REG_BANK0_ETXSTH    (0x05)
#define REG_BANK0_ETXNDL    (0x06)
#define REG_BANK0_ETXNDH    (0x07)
#define REG_BANK0_ERXSTL    (0x08)
#define REG_BANK0_ERXSTH    (0x09)
#define REG_BANK0_ERXNDL    (0x0A)
#define REG_BANK0_ERXNDH    (0x0B)
#define REG_BANK0_ERXRDPTL  (0x0C)
#define REG_BANK0_ERXRDPTH  (0x0D)
#define REG_BANK0_ERXWRPTL  (0x0E)
#define REG_BANK0_ERXWRPTH  (0x0F)

/**********bank1寄存器*************************/
#define REG_BANK1_ERXFCON   (0x18)
#define REG_BANK1_EPKTCNT   (0x19)

/**********bank2寄存器*************************/
#define REG_BANK2_MACON1    (0x00)
#define REG_BANK2_MACON2    (0x01)
#define REG_BANK2_MACON3    (0x02)
#define REG_BANK2_MACON4    (0x03)
#define REG_BANK2_MABBIPG   (0x04)
#define REG_BANK2_MAIPGL    (0x06)
#define REG_BANK2_MAIPGH    (0x07)
#define REG_BANK2_MACLCON1  (0x08)
#define REG_BANK2_MACLCON2  (0x09)
#define REG_BANK2_MAMXFLL   (0x0A)
#define REG_BANK2_MAMXFLH   (0x0B)
#define REG_BANK2_MAPHSUP   (0x0D)
#define REG_BANK2_MICON     (0x11)
#define REG_BANK2_MICMD     (0x12)
#define REG_BANK2_MIREGADR  (0x14)
#define REG_BANK2_MIWRL     (0x16)
#define REG_BANK2_MIWRH     (0x17)
#define REG_BANK2_MIRDL     (0x18)
#define REG_BANK2_MIRDH     (0x19)

/**********bank3寄存器*************************/
#define REG_BANK3_MAADR0    (0x01)
#define REG_BANK3_MAADR1    (0x00)
#define REG_BANK3_MAADR2    (0x03)
#define REG_BANK3_MAADR3    (0x02)
#define REG_BANK3_MAADR4    (0x05)
#define REG_BANK3_MAADR5    (0x04)
#define REG_BANK3_MISTAT    (0x0A)

/**********PHY寄存器*************************/
#define REG_PHY_PHCON1      (0x00)
#define REG_PHY_PHSTAT1     (0x01)
#define REG_PHY_PHCON2      (0x10)
#define REG_PHY_PHSTAT2     (0x11)

/**********EIE寄存器位*************************/
#define EIE_FLAG_INTI       (0x80) /* 全局 INT 中断允许位 */
#define EIE_FLAG_PKT        (0x40) /* 接收数据包待处理中断允许位 */
#define EIE_FLAG_DMA        (0x20) /* DMA 中断允许位 */
#define EIE_FLAG_LINK       (0x10) /* 连接状态改变中断允许位 */
#define EIE_FLAG_TX         (0x08) /* 发送中断允许位 */
#define EIE_FLAG_WOL        (0x04) /* WOL 中断允许位 */
#define EIE_FLAG_TXER       (0x02) /* 发送错误中断允许位 */
#define EIE_FLAG_RXER       (0x01) /* 接收错误中断允许位 */

/**********EIR寄存器位*************************/
#define EIR_FLAG_PKT        (0x40) /* 接收数据包待处理中断标志位 */
#define EIR_FLAG_DMA        (0x20) /* DMA 中断标志位 */
#define EIR_FLAG_LINK       (0x10) /* 连接状态改变中断标志位 */
#define EIR_FLAG_TX         (0x08) /* 发送中断标志位 */
#define EIR_FLAG_WOL        (0x04) /* WOL 中断标志位 */
#define EIR_FLAG_TXER       (0x02) /* 发送错误中断标志位 */
#define EIR_FLAG_RXER       (0x01) /* 接收错误中断标志位 */

extern uint8_t default_mac_addr[6];

void __ENC28J60_RCR_ETH(uint8_t addr, uint8_t *pData);
void __ENC28J60_RCR_MAC_MII(uint8_t addr, uint8_t *pData);
void __ENC28J60_WCR(uint8_t addr, uint8_t *pData);
void __ENC28J60_BFS(uint8_t addr, uint8_t mask);
void __ENC28J60_BFC(uint8_t addr, uint8_t mask);
void __ENC28J60_SET_BANK(uint8_t bank);

uint8_t ENC28J60_Init(uint8_t mac_addr[6]);
void ENC28J60_MACLoopBackEnable(void);
void ENC28J60_MACLoopBackDisable(void);
uint8_t ENC28J60_SendPacket(uint8_t *pBuff, uint16_t len);
uint16_t ENC28J60_ReceivePacket(uint8_t *pBuff, uint16_t max_len);

#if ENC28J60_ENABLE_INT
void ENC28J60_EnableINT(uint8_t flag);
void ENC28J60_DisableINT(uint8_t flag);
uint8_t ENC28J60_GetInterruptFlag(void);
#endif

#endif // ENC28J60_H

